1. Technical Field
Example embodiments of the present invention relate in general to devices for providing bias to a base station power amplifier or a terminal power amplifier used for high efficiency and high linearity in radio communications.
2. Related Art
Various circuits and devices for dynamic bias of power amplifiers are known. Such a dynamic bias switching circuit switches dynamic bias to a power amplifier.
FIG. 1 is a block diagram of a general dynamic bias switching device.
FIG. 1 illustrates an example of the structure of a device conventionally suggested to supply dynamic bias to a power amplifier. The device provides an input signal to a main path (a limiter 20, a delayer 30, and a main amplifier 40) and a bias path (an envelope signal detector 50, an envelope signal processor/switch unit 60) through a splitter.
In general, an input signal has magnitude and phase information. A splitter 10 splits the input signal into two signals and provides the two signals to a limiter 20 and an envelope signal detector 50, respectively.
In the main path, the limiter 20 extracts a phase signal from the magnitude and phase information included in the input signal, and a delayer 30 synchronizes a switching operation in which a signal to be input to a main amplifier 40 is transferred to the main amplifier 40 by an envelope signal processor/switch unit 60. The processed signal is provided to the main amplifier 40. The main amplifier 40 receives and amplifies the output signal of the delayer 30 to a desired magnitude.
In the bias path, when the input signal is received from the splitter 10, the envelope signal detector 50 detects magnitude and phase signals from the input signal as an envelope signal and provides the envelope signal to the envelope signal processor/switch unit 60. The envelope signal processor/switch unit 60 generates a dynamic signal having an appropriate signal level required for the switching operation in response to the envelope signal provided by the envelope signal detector 50. Also, the envelope signal processor/switch unit 60 applies bias voltage and current to the main amplifier 40 using the dynamic signal (a dynamically variable input magnitude and phase signal). When dynamic bias is supplied as the bias of the main amplifier 40, it is possible to achieve high linearity and high efficiency according to the dynamic bias.
Well-known dynamic bias supply devices include envelope elimination and restoration (EER) and hybrid EER devices. The EER device has the above-described constitution including a limiter. A non-linear amplifier is used as a main amplifier. Unlike the EER device, the hybrid EER device has a structure in which a main amplifier receives and uses an input signal as is without receiving a phase signal. Thus, the hybrid EER device has the constitution of FIG. 1 excluding a limiter. The structure is the same as the path of a main amplifier of an envelope tracking (ET) device, and a main amplifier of the dynamic bias supply device uses EER. For this reason, the structure is referred to as hybrid EER.
The conventional dynamic bias supply device of FIG. 1 can be implemented with an ET or dynamic-bias supply (DBS) device.
The ET and DBS devices each include a splitter, an envelope signal detector, a delayer, an envelope signal processor/switch unit, and a main amplifier. Since the constitution is similar to that of the dynamic bias supply device of FIG. 1, its detailed description will be omitted. The main amplifier uses an input signal as is, and an amplifier of a linear amplifier mode is used as the main amplifier. An envelope signal that is input to the envelope signal detector and converted into an appropriate dynamic level is input to the envelope signal processor/switch unit, and the envelope signal processor/switch unit supplies dynamic bias to the main amplifier using the input signal.
The DBS and ET devices operate in a similar way except that the DBS device does not supply bias according to a variable dynamic level. The DBS device sets an appropriate reference level, and supplies bias using a low output voltage and current level of a main amplifier when a dynamic level is below the reference level and using a high output voltage and current level of the main amplifier when a dynamic level is the reference level or above. In other words, the DBS device has a structure that supplies different bias voltages and currents according to dual or various reference voltage levels.
A Dual dynamic bias supply (DDBS) device is also a well-known dynamic bias supply device. The DDBS device operates in a similar way to the DBS device described above. The DDBS device does not receive an input signal through a splitter and does not detect and use an envelope signal. The DDBS device obtains a magnitude signal alone before a modem implemented by a digital signal processor (DSP) or field programmable gate array (FPGA) modulates the magnitude signal and a phase signal obtained by modulating the input signal into a radio frequency (RF) signal and immediately uses the magnitude signal. Thus, the DDBS device has a simpler structure than the DBS device.
Meanwhile, a power amplifier may consist of one power amplifier or a plurality of power amplifiers. The power amplifier consisting of a plurality of power amplifiers is referred to as multiple parallel power amplifiers.
Since multiple parallel power amplifiers include a plurality of power amplifiers, bias should be supplied to the power amplifiers.
In general, the dynamic bias switching circuit of multiple parallel power amplifiers has a structure in which one dynamic bias circuit is shared by all the multiple parallel power amplifiers.
FIG. 2 is a block diagram of a dynamic bias supply device for multiple parallel power amplifiers, particularly, parallel two-stage power amplifiers. The structure of the dynamic bias supply device is obtained by modifying the example of the amplifier constitution for achieving high efficiency and high linearity described with reference to FIG. 1 into two stages. An envelope signal processor/switch unit 140 includes an envelope signal processor 142 and a switch 144, and its description has been given with reference to FIG. 1.
Referring to FIG. 2, the dynamic bias supply device includes an input network 210 and an output network 230. The input network 210 and the output network 230 include matching circuits for matching the inputs and outputs of the networks and for matching multiple parallel power amplifiers, and an input/output (I/O) matching circuit of the amplifiers.
When the multiple parallel power amplifiers use a single dynamic bias supply device, along with a lines 220 through which bias is supplied from the switch 144, b lines 222, which are unnecessary, are included. When such unnecessary lines cause a mismatch between power amplifiers 224, the mismatch causes performance deterioration, such as a memory effect, non-linearity and efficiency deterioration, and high linearity and high efficiency are deteriorated.
In other words, many constitutions for dynamic bias supply as shown in FIG. 2 have been suggested and announced. However, when each of the constitutions is installed in multiple parallel power amplifiers as a single dynamic bias supply device, the constitution deteriorates high linearity and high efficiency.